Testing Module Leverages FMC

Description

The GX3800e High-Performance PXI Express FPGA module employs the Altera Cyclone V FPGA, which supports data rates up to 3.125 Gb/s and features over 300,000 logic elements and 12.2 Kb of user memory.  The module uses a daughter card for the I/O physical layer and these cards can be commercial off the shelf VITA 57 FMC (FPGA Mezzanine Card) modules, MTS’ line of daughter cards, or user-designed cards. This approach facilitates the integration of many applications and interfaces including A to D, D to A, Camera Link, FPDP, and high-speed serial using a single PXIe slot.  The design of the FPGA is done using Altera’s Quartus or the license-free Quartus Prime Lite toolset.

 

The user FPGA’s interface to the PXIe bus is partitioned via an internal address and data bus which is accessed via predefined registers and supported by the module’s software driver and an interactive UI. The result is a simplified design/integration process since both the PXIe bus interface and associated software driver are known, tested entities. And as an added benefit, the compiled FPGA design can be loaded into onboard flash memory via this same interface, providing users with an easy way to incrementally design/test/modify their FPGA code.

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