Dual Channel Data Acquisition Board

Description

An ultra-fast 4GSPS dual-channel 12-bit PCIe Gen3 data acquisition board allowing concurrent acquisition of two 12-bit A/D channels at up to 2 GSPS (4 GSPS for 1-channel) is available. The AD12-2000x2K7US’s unique combination of a low-noise DC-2 GHz front end, fast ECL, TTL and analog waveform triggers, deep 8GB on-board buffer, and programmable sampling rate from either a low-jitter internal synthesizer or an external clock enable new capabilities in communications, spectroscopy, SIGINT, surveillance, missile testing, radar and other defense, scientific, and medical applications. When installed in any x16 or x8 PCIe slot, the AD12-2000x2K7US can acquire data at up to 8 GB/sec, optionally process it in the on-board Kintex7Ultrascale FPGA, and continuously stream the data via 6.5-7GB/sec (system dependent) DMA to host system RAM for immediate use, display, or storage to disk. When installed in a suitable system with dedicated RAID, optional data recorder software enables seamless recording of terabytes of data without interruption.

 

ECL/PECL/edge trigger inputs cause sampling to start within 40ns of trigger, and a selective recording feature allows acquisition to then be dynamically stopped and started in response to a TTL input, reducing memory or disk usage and bandwidth by storing only needed data, for RADAR, NMR and burst communication applications. The board can automatically acquire specified burst lengths of data ranging from 4 Gigasamples down to only a few kilosamples, repeatably triggered, with only a few samples dead time between bursts. Alternatively a scope-like adjustable waveform trigger can be used to acquire, and optionally average, thousands of waveform segments, enabling a DANL of -150dB.

 

The board can sample up to 4 TTL signals concurrently with the analog inputs, for time-locked registration of the analog data with fiducials such as radar antenna angle, sweep retrace, etc.

 

The AD12-2000x2K7US supports external clocks of 300 MHz to 2000 MHz (600 MSPS to 4000 MSPS on a single channel).  It also has a low-jitter programmable internal clock.  

 

Designed for critical applications, the AD12-2000x2K7US allows either straight DAQ, requiring no user development, or in-line FPGA dataflow processing using the on-board Xilinx Kintex7 Ultrascale FPGA. 

 

For use as a standard data acquisition board the supplied software allows users to acquire, view, and store, data “right out of the box”. Drivers, user software and example source code are supplied for both 64-bit Linux and 64bit Windows10TM and 7.  Graphical waveform display software, and routines to store data to disk are included with all boards, in C-language source and ready-to-run executable form. A complete, high visibility, LabVIEWTM control panel display for 64-bit Windows is also included.

 

An optional GUI-based “Data Recorder” package allows data to be stored at over 6GB/s into system RAM or RAID. Preconfigured rack-mountable, multi-terabyte, data recorder systems containing AD12-2000x2K7US boards may also be purchased.

 

The AD12-2000x2K7US shares a modular Front-end Mezzanine architecture with Ultraview’s complete line of 8, 12, 14 and 16-bit A/D boards, enabling a common software platform for all models.

 

The AD12-2000x2K7US's supplied VHDL firmware source lets users optionally modify the board's supplied standard data acquisition firmware to perform advanced application-specific hardware signal processing, including filtering, sub-band tuning, spectroscopy, SDR, ultra-fast real-time tone decoding, and image processing.  This modular VHDL firmware source is available to OEM users at no charge under NDA.  The company also offers custom firmware development for OEM applications.

Specs

Resolution:12 Bits
SNR:63 dB
Input Range:+/-375mV (750mVpp)
Input Impedance:50 ohms || 2pF
Input Bandwidth:DC to 1.7 GHz (-3dB BW)
Sampling Rate
  • Maximum:
  • Minimum:

2000 MSPS (4.0 GSPS in single channel mode)
200 MSPS (400 MSPS in single channel mode
DMA Transfer Rate:Typically >1 GB/s (host system dependent) for XC5VLX FPGA's
Typically >6 GB/s (host system dependent) for XCKU FPGA's

 

 

Features:

  • Example programs (with included source code) allow users to immediately begin acquiring data and modifying these programs for custom applications.
  • Example C-source code and VHDL Project can be quickly recompiled to target any Ultraview PCIe Data Acquisition Product.
  • VHDL project with source code targeting on-board FPGA is available to OEM customers under NDA allowing real-time signal processing.
  • Linux and Windows XP/Vista/7/8 (32/64-bit) device drivers.
  • Powerful 32 and 64-bit LabVIEW GUI included.
  • External clock and trigger inputs allow synchronization of multiple devices.
  • TTL I/O accessible in example software.
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